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Processors (WO 2010/082067 A2)

The University of Reading (2010) Processors (WO 2010/082067 A2). WO 2010/082067 A2.

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A processing system comprises a plurality of processors (12) and communication means (20) arranged to carry messages between the processors, wherein each of the processors (12) has an operating instruction memory field (32, 34, 36) arranged to hold stored operating instructions including a re-routing target address. Each processor is arranged to receive a message (38) including operating instructions including a target address. On receipt of the message, each processor is arranged to: check the target address in the message to determine whether it corresponds to an address associated with the processor; if the target address in the message does correspond to an address associated with the processor, to check the operating instructions in the message to determine whether the message is to be re-routed; and, if the message is to be re-routed, to replace operating instructions within the message with the stored operating instructions, and place the message on the communication means for delivery to the re-routing target address.

Item Type:Patent
Divisions:Science > School of Mathematical, Physical and Computational Sciences > Department of Computer Science
ID Code:16966
Additional Information:The full text of the application can be downloaded from: If accessing via the "Search" page use the following format for the Number : WO2010082067


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