A quantum multiply-accumulatorMaynard, C. M. and Pius, E. (2014) A quantum multiply-accumulator. Quantum Information Processing, 13 (5). pp. 1127-1138. ISSN 1573-1332 Full text not archived in this repository. It is advisable to refer to the publisher's version if you intend to cite from this work. See Guidance on citing. To link to this item DOI: 10.1007/s11128-013-0715-5 Abstract/SummaryThis paper proposes a quantum multiply-accumulator circuit (QMAC), which can perform the calculation on conventional integers faster than its classical counterpart. Whereas classically applying a multiply–adder (MAC) n times to k bit integers would require O(n log k) parallel steps, the hybrid QMAC needs only O(n+k) steps for the exact result and O(n+log k) steps for an approximate result. The proposed circuit could potentially be embedded in a conventional computer architecture as a quantum device or accelerator, enabling a wide range of applications to execute faster.
Altmetric Deposit Details University Staff: Request a correction | Centaur Editors: Update this record |