Nath, R. and Manjunathaiah, M. (2019) Sparse feature extraction model with independent subspace analysis. In: 4th International Conference, LOD 2018, 13-16 Sep 2019, Volterra, Italy, pp. 494-505.

Vizcaino, N. and Manjunathaiah, M. (2015) Software evolution: a graph based model. Lecture notes on software engineering, 3 (3). pp. 164-167. ISSN 2301-3559 doi: https://doi.org/10.7763/LNSE.2015.V3.183

Vizcaino, N. and Manjunathaiah, M. (2014) Software evolution: a graph based model. In: 2014 6th International Conference on Software Technology and Engineering, 17-18 Sept 2014, Paris, France.

Osprey, A., Riley, G. D., Manjunathaiah, M. and Lawrence, B. ORCID: https://orcid.org/0000-0001-9262-7860 (2014) The development of a data-driven application benchmarking approach to performance modelling. In: 2014 International Conference on High Performance Computing Simulation (HPCS), 21-25 July 2014, Bologna, Italy, pp. 715-723.

Osprey, A., Lawrence, B. ORCID: https://orcid.org/0000-0001-9262-7860, Manjunathaiah, M. and Riley, G. (2013) A benchmark-driven modelling approach for evaluating deployment choices on a multi-core architecture. In: Exascale Applications and Software Conference, Edinburgh, U.K.

Manjunathaiah, M. (2013) Fine-grained multi-phase array designs. Journal of Parallel and Distributed Computing, 73 (8). pp. 1076-1082. ISSN 0743-7315 doi: https://doi.org/10.1016/j.jpdc.2013.03.003

Osprey, A., Riley, G., Manjunathaiah, M. and Lawrence, B. ORCID: https://orcid.org/0000-0001-9262-7860 (2013) A benchmark-driven modelling approach for evaluating deployment choices on a multicore architecture. In: Proceedings of the International Conference on Parallel & Distributed Processing Techniques & Application (PDPTA'13), July 22-25 2013, Las Vegas.

Manjunathaiah, M. (2011) CSP as a general concurrency model. In: Workshop on Integrating Parallelism Throughout the Undergraduate Computing Curriculum, San Antonio, Texas, USA.

Manjunathaiah, M. (2009) Analysing variable sharing in a co-design compiler. HiPEAC.

Manjunathaiah, M. (2009) Hierarchical composite regular parallel architecture. In: Sousa, L. and Robert, Y. (eds.) Eighth International Symposium on Parallel and Distributed Computing, Proceedings. IEEE Computer Soc, Los Alamitos, pp. 253-256. ISBN 9780769536804 doi: https://doi.org/10.1109/ispdc.2009.41

de Dinechin, F., Manjunathaiah, M., Risset, T. and Spivey, M. (2004) Design of highly parallel architecture with Alpha and Handel. In: Villar, E. and Mermet, J. (eds.) System Specification and Design Languages: Best of FDL '02. The ChDL Series, 4. Kluwer Academic Publishers, Boston, pp. 293-302. ISBN 140207414X doi: https://doi.org/10.1007/0-306-48734-9_24

Manjunathaiah, M. and Megson, G. M. (2004) Tools for regularizing Array Designs. Parallel Algorithms and Applications, 19 (1). pp. 51-75. ISSN 1063-7192 doi: https://doi.org/10.1080/1063719042000208854

Cau, A., Hale, R., Dimitrov, J., Zedan, H., Moszkowski, B., Manjunathaiah, M. and Spivey, M. (2002) A compositional framework for hardware/software co-design. Design Automation for Embedded Systems, 6 (4). pp. 367-399. ISSN 1572-8080 doi: https://doi.org/10.1023/A:1016507527035

Manjunathaiah, M. and Megson, G. (2002) Compositional technique for synthesising multi-phase regular arrays. In: Proceedings of ASAP '02, the 13th IEEE Conference on Application-Specific Systems, Architectures and Processors. IEEE Computer Society, Washington DC, pp. 7-16. ISBN 0769517129 doi: https://doi.org/10.1109/ASAP.2002.1030700

Manjunathaiah, M., Megson, G., Rajopadhye, S. and Risset, T. (2001) Uniformization of affine dependence programs for parallel embedded system design. In: Ni, L. M. and Valero, M. (eds.) Proceedings of the International Conference on Parallel Processing. IEEE Computer Society, LOS ALAMITOS, CA 90720-1264 USA , pp. 205-213. ISBN 0769512577 doi: https://doi.org/10.1109/ICPP.2001.952064

Manjunathaiah, M., Megson, G., Rajopadhye, S. and Risset, T., (2000) Uniformization tool for systolic array designs. Rapport de Recherche. 1350. Technical Report. Irisa, Rennes, France.

Manjunathaiah, M., (1999) Design of multi-phase regular arrays. RUCS/1999/TR/016/A. Technical Report. The University of Reading

Manjunathaiah, M., (1999) Tools for regularising array designs. RUCS/1999/TR/015/A. Technical Report. The University of Reading

Manjunathaiah, M. and Nicole, D. A. (1997) Precise analysis of array usage in scientific programs. Scientific Programming, 6 (2). pp. 229-242. ISSN 1875-919X