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A practical method for testing high-speed networking hardware architectures

Pejovic, V., Bojanic, S., Carreras, C. and Badii, A. (2009) A practical method for testing high-speed networking hardware architectures. In: 2009 fifth international conference on networking and services, Valencia, Spain.

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To link to this article DOI: 10.1109/ICNS.2009.50

Abstract/Summary

This paper deals with the key issues encountered in testing during the development of high-speed networking hardware systems by documenting a practical method for "real-life like" testing. The proposed method is empowered by modern and commonly available Field Programmable Gate Array (FPGA) technology. Innovative application of standard FPGA blocks in combination with reconfigurability are used as a back-bone of the method. A detailed elaboration of the method is given so as to serve as a general reference. The method is fully characterised and compared to alternatives through a case study proving it to be the most efficient and effective one at a reasonable cost.

Item Type:Conference or Workshop Item (Paper)
Divisions:Faculty of Science > School of Systems Engineering
ID Code:14826
Uncontrolled Keywords:test, testability platform, networking hardware, FPGA, re-configurability, high-speed prototyping

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