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Trans-floating-point arithmetic removes nine quadrillion redundancies from 64-bit IEEE 754 floating-point arithmetic

Anderson, J. A.D.W. (2014) Trans-floating-point arithmetic removes nine quadrillion redundancies from 64-bit IEEE 754 floating-point arithmetic. In: International Conference on Computer Science and Applications (WCECS 2014), 22-24 October, 2014, San Francisco, USA, pp. 80-85.

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Official URL: http://www.iaeng.org/publication/WCECS2014/

Abstract/Summary

IEEE 754 floating-point arithmetic is widely used in modern, general-purpose computers. It is based on real arithmetic and is made total by adding both a positive and a negative infinity, a negative zero, and many Not-a-Number (NaN) states. Transreal arithmetic is total. It also has a positive and a negative infinity but no negative zero, and it has a single, unordered number, nullity. Modifying the IEEE arithmetic so that it uses transreal arithmetic has a number of advantages. It removes one redundant binade from IEEE floating-point objects, doubling the numerical precision of the arithmetic. It removes eight redundant, relational,floating-point operations and removes the redundant total order operation. It replaces the non-reflexive, floating-point, equality operator with a reflexive equality operator and it indicates that some of the exceptions may be removed as redundant { subject to issues of backward compatibility and transient future compatibility as programmers migrate to the transreal paradigm.

Item Type:Conference or Workshop Item (Paper)
Refereed:Yes
Divisions:Faculty of Science > School of Mathematical, Physical and Computational Sciences > Department of Computer Science
ID Code:37222
Uncontrolled Keywords:transreal arithmetic, transreal numbers, floating-point arithmetic
Additional Information:Proceedings: World Congress on Engineering and Computer Science 2014, San Francisco, USA, 22-24 October, 2014 Publisher: International Association of Engineers Pages: 80-85 ISBN: 9789881925206 ISSN: 2078-0958
Publisher:IAENG

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