Article

Manjunathaiah, M. (2009) Analysing variable sharing in a co-design compiler. HiPEAC.

Manjunathaiah, M. and Megson, G. M. (2004) Tools for regularizing Array Designs. Parallel Algorithms and Applications, 19 (1). pp. 51-75. ISSN 1063-7192 doi: 10.1080/1063719042000208854

Cau, A., Hale, R., Dimitrov, J., Zedan, H., Moszkowski, B., Manjunathaiah, M. and Spivey, M. (2002) A compositional framework for hardware/software co-design. Design Automation for Embedded Systems, 6 (4). pp. 367-399. ISSN 1572-8080 doi: 10.1023/A:1016507527035

Book or Report Section

Manjunathaiah, M. (2009) Hierarchical composite regular parallel architecture. In: Sousa, L. and Robert, Y. (eds.) Eighth International Symposium on Parallel and Distributed Computing, Proceedings. IEEE Computer Soc, Los Alamitos, pp. 253-256. ISBN 9780769536804 doi: 10.1109/ispdc.2009.41

de Dinechin, F., Manjunathaiah, M., Risset, T. and Spivey, M. (2004) Design of highly parallel architecture with Alpha and Handel. In: Villar, E. and Mermet, J. (eds.) System Specification and Design Languages: Best of FDL '02. The ChDL Series, 4. Kluwer Academic Publishers, Boston, pp. 293-302. ISBN 140207414X doi: 10.1007/0-306-48734-9_24

Manjunathaiah, M. and Megson, G. (2002) Compositional technique for synthesising multi-phase regular arrays. In: Proceedings of ASAP '02, the 13th IEEE Conference on Application-Specific Systems, Architectures and Processors. IEEE Computer Society, Washington DC, pp. 7-16. ISBN 0769517129 doi: 10.1109/ASAP.2002.1030700

Manjunathaiah, M., Megson, G., Rajopadhye, S. and Risset, T. (2001) Uniformization of affine dependence programs for parallel embedded system design. In: Ni, L. M. and Valero, M. (eds.) Proceedings of the International Conference on Parallel Processing. IEEE Computer Society, LOS ALAMITOS, CA 90720-1264 USA , pp. 205-213. ISBN 0769512577 doi: 10.1109/ICPP.2001.952064

Report

Manjunathaiah, M., Megson, G., Rajopadhye, S. and Risset, T. (2000) Uniformization tool for systolic array designs. Rapport de Recherche. 1350. Technical Report. Irisa, Rennes, France.