A practical method for testing high-speed networking hardware architecturesPejovic, V., Bojanic, S., Carreras, C. and Badii, A. (2009) A practical method for testing high-speed networking hardware architectures. In: 2009 fifth international conference on networking and services, Valencia, Spain, https://doi.org/10.1109/ICNS.2009.50 . Full text not archived in this repository. It is advisable to refer to the publisher's version if you intend to cite from this work. See Guidance on citing. To link to this item DOI: 10.1109/ICNS.2009.50 Abstract/SummaryThis paper deals with the key issues encountered in testing during the development of high-speed networking hardware systems by documenting a practical method for "real-life like" testing. The proposed method is empowered by modern and commonly available Field Programmable Gate Array (FPGA) technology. Innovative application of standard FPGA blocks in combination with reconfigurability are used as a back-bone of the method. A detailed elaboration of the method is given so as to serve as a general reference. The method is fully characterised and compared to alternatives through a case study proving it to be the most efficient and effective one at a reasonable cost.
Altmetric Deposit Details University Staff: Request a correction | Centaur Editors: Update this record |
Lists
Lists
