Partial dynamic reconfiguration of FPGAs for systolic circuits

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Cadenas Medina, O. (2002) Partial dynamic reconfiguration of FPGAs for systolic circuits. PhD thesis, University of Reading

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Item Type:	Thesis (PhD)
Thesis Supervisor:	Megson, G.
Thesis/Report Department:	Department of Electronic Engineering
Identification Number/DOI:
Divisions:	Science
ID Code:	18884

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University of Reading