Seal Formation in Silicon Planar Patch-Clamp MicrostructuresCurtis, J.C., Baldwin, K., Dworak, B.J., Stevenson, J., Delivopoulos, E. ORCID: https://orcid.org/0000-0001-6156-1133, MacLeod, N.K. and Murray, A.F. (2008) Seal Formation in Silicon Planar Patch-Clamp Microstructures. Journal of Microelectromechanical Systems, 17 (4). pp. 974-983. ISSN 1057-7157 Full text not archived in this repository. It is advisable to refer to the publisher's version if you intend to cite from this work. See Guidance on citing. To link to this item DOI: 10.1109/JMEMS.2008.924270 Abstract/SummaryThis paper presents a microfabricated planar patch-clamp electrode design and looks at the impact of several physical characteristics on seal formation. The device consists of a patch aperture, 1.5-2.5 mum in diameter and 7-12 mum in depth, with a reverse-side deep-etched 80-mum well. The patch aperture was coated with either thermal oxide or plasma-enhanced chemical vapor deposited (PECVD) SiO2. Some of the thermal oxide devices were converted into protruding nozzle structures, and some were boron-doped. Seal formation was tested with cultured N2a neuroblastoma cells. The PECVD oxide devices produced an average seal resistance of 34 MOmega(n = 24), and the thermal oxide devices produced an average seal resistance of 96 MOmega(n = 59). Seal resistance was found to positively correlate with patch aperture depth. Whole-cell recordings were obtained from 14% of cells tested with the thermal oxide devices, including a single recording where a gigaohm seal was obtained.
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